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TSL202
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D
128
в
1 Sensor-Element Organization
D
200 Dots-Per-Inch (DPI) Sensor Pitch
D
Performance Upgrade for the Texas
Instruments TSL215
D
High Linearity and Uniformity
for 256 Gray-Scale (8-Bit) Applications
D
Output Referenced to Ground
D
Low Image Lag . . . 0.5% Typ
D
Operation to 2 MHz
D
Single 5-V Supply
Description
The TSL202 linear sensor array consists of two sections of 64 photodiodes and associated charge amplifier
circuitry. The pixels measure 120
╣
m (H) by 70
╣
m (W) with 125-
╣
m center-to-center spacing and 55-
╣
m
spacing between pixels. Operation is simplified by internal control logic that requires only a serial-input (SI)
signal and a clock.
The TSL202 is intended for use in a wide variety of applications including mark detection and code reading,
optical character recognition (OCR) and contact imaging, edge detection and positioning as well as optical linear
and rotary encoding. The TSL202 is pin­compatible with the Texas Instruments TSL215.
Functional Block Diagram (each section ­ pin numbers apply to section 1)
2
3
SI
CLK
64-Bit Shift Register
Q64
Switch Control Logic
Integrator
Reset
_
+
Pixel 1
Pixel
2
Pixel
64
Pixel
3
Sample/
Output
Analog
Bus
Output
Amplifier
5
Gain
Trim
Q3
Q2
Q1
V
DD
1
4
R
L
(External
Load)
AO
t
t
Texas Advanced Optoelectronic Solutions Inc.
800 Jupiter Road, Suite 205
S
Plano, TX 75074
S
(972) 673-0759
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
SI1
CLK
AO1
GND
SO2
VPP
NC
SO1
GND
NC
SI2
NC
AO2
(TOP VIEW)
NC ­ No internal connection
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Terminal Functions
TERMINAL
NAME
NO.
DESCRIPTION
AO1
4
Analog output of section 1
AO2
8
Analog output of section 2
CLK
3
Clock. Clk controls charge transfer, pixel output, and reset.
GND
5,12
Ground (substrate). All voltages are referenced to GND.
NC
9, 11, 14 No internal connection
SI1
2
Serial input (section 1). SI1 defines the start of the data-out sequence.
SI2
10
Serial input (section 2). SI2 defines the start of the data-out sequence.
SO1
13
Serial output (section 1). SO1 provides a signal to drive the SI2 input.
SO2
6
Serial output (section 2). SO2 provides a signal to drive the SI input of another device for
cascading or as an end-of-data indication.
V
DD
1
Supply voltage. Supply voltage for both analog and digital circuitry.
VPP
7
Connected to Vdd
Detailed Description (assumes serial connection)
The sensor consists of 128 photodiodes arranged in a linear array. Light energy impinging on a photodiode
generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. During
the integration period, a sampling capacitor connects to the output of the integrator through an analog switch.
The amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration
time. The integration time is the interval between two consecutive output periods.
The output and reset of the integrators is controlled by a 128-bit shift register and reset logic. An output cycle
is initiated by clocking in a logic 1 on SI for one positive going clock edge (see Figures 1 and 2). As the SI pulse
is clocked through the 128-bit shift register, the charge on the sampling capacitor of each pixel is sequentially
connected to a charge-coupled output amplifier that generates a voltage output AO. When the bit position goes
low the pixel integrator is reset. On the 129th clock rising edge, the SI pulse is clocked out of the shift register
and the output assumes a high impedance state. Note that this 129th clock pulse is required to terminate the
output of the 128th pixel and return the internal logic to a known state. A subsequent SI pulse can be presented
on the 130th clock pulse, thereby initiating another pixel output cycle.
The voltage developed at analog output (AO) is given by:
Vout = KEt
where:
Vout is the output voltage
K is the device responsivity for a given wavelength of light given
in V/(
╣
J/cm
2
)
E is the intensity of light at each pixel given in
╣
W/cm
2
t is integration time in seconds
AO is driven by a source follower that requires an external pulldown resistor (330 ohms typ.). The source
follower configuration permits an analog wired OR hookup of multiple devices. When the device is not in the
output phase, AO is in a high impedance state. The output is nominally 0 volts for no light and 2 volts for a
nominal white level output, with a nominal full-scale (saturation) voltage of 2.5V.
The TSL202 can be connected in the serial mode, in which 128 clocks are required to read out all the pixels,
or in the parallel mode in which 64 clocks are required to read out all pixels (see application section).
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Absolute Maximum Ratings
Supply voltage, V
DD
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input current range, I
I
­20 mA to 20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
0
╟
C to 70
╟
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
­25
╟
C to 85
╟
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
╟
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Recommended Operating Conditions (see Figure 1 and Figure 2)
MIN
NOM
MAX
UNIT
Supply voltage, V
DD
4.5
5
5.5
V
Input voltage, V
I
0
V
DD
V
High-level input voltage, V
IH
V
DD
в
0.7
V
DD
V
Low-level input voltage, V
IL
0
V
DD
в
0.3
V
Wavelength of light source,
400
1000
nm
Clock frequency, f
clock
5
2000
kHz
Sensor integration time, t
int
0.0325
100
ms
Setup time, serial input, t
su(SI)
20
ns
Hold time, serial input, t
h(SI)
(see Note 1)
0
ns
Operating free-air temperature, T
A
0
70
╟
C
NOTE 1: SI must go low before the rising edge of the next clock pulse.
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129 Clock Cycles
CLK
SI
AO
Hi-Z
Hi-Z
Figure 1. Timing Waveforms (serial connection)
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Electrical Characteristics at f
clock
= 200 kHz, V
DD
= 5 V, T
A
= 25
╟
C,
p
= 565 nm, t
int
= 5 ms,
R
L
= 330
, E
e
= 20
╣
W/cm
2
(unless otherwise noted) (see Note 2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analog output voltage (white, average over 128 pixels)
1.6
2
2.4
V
Analog output voltage (dark, average over 128 pixels)
E
e
= 0
0
0.07
0.15
V
PRNU Pixel response nonuniformity
See Note 3
╠
10
%
Nonlinearity of analog output voltage
See Note 4
╠
0.4%
FS
Output noise voltage
See Note 5
1
mVrms
Saturation exposure
See Note 6
120
137
nJ/cm
2
Analog output saturation voltage
2.5
2.75
V
DSNU Dark signal nonuniformity
See Note 7
E
e
= 0
0.04
0.120
V
IL
Image lag
See Note 8
0.5%
I
DD
Supply current
5
8
mA
I
IH
High-level input current
V
I
= V
DD
10
╣
A
I
IL
Low-level input current
V
I
= 0
10
╣
A
C
i
Input capacitance
10
pF
NOTES: 2. Clock duty cycle is assumed to be 50%.
3. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the
device under test when the array is uniformly illuminated.
4. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent
of analog output voltage (white).
5. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period.
6. Saturation exposure is calculated using the maximum responsivity and minimum output saturation voltage figures.
7. DNSU is the difference between the maximum and minimum of dark-current voltage.
8. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after
a pixel is exposed to a white condition followed by a dark condition:
IL
+
V
AO
­V
AO(dark)
V
AO(white)
­V
AO(dark)
100
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Operating Characteristics over recommended ranges of supply voltage and operating free-air
temperature (see Figure 2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
pd(SO)
Propagation Delay time, SO1, SO2
50
ns
t
w(H)
Clock pulse duration (high)
50
ns
t
w(L)
Clock pulse duration (low)
50
ns
t
s
Analog output settling time to
╠
1%
R
L
= 330
, C
L
= 50 pF
350
ns
50%
AO1(AO2)
SI1(SI2)
CLK
Pixel 64 (128)
t
s
0 V
0 V
5 V
t
h(SI)
5 V
t
su(SI)
t
w(H)
1 (65)
2 (66)
64 (128)
65 (129)
Pixel 1 (65)
t
pd(SO)
t
pd(SO)
SO1(SO2)
t
s
t
w(L)
Figure 2. Operational Waveforms (each section)
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APPLICATION INFORMATION
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1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
SI1
CLK
AO1
GND
SO2
VPP
NC
SO1
GND
NC
SI2
NC
AO2
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R
L
SI
CLK
SI1
CLK
SO1, SI2
AO Common
AO
64 Cycles
65 Cycles
t
int
AO1
(1­64)
AO2
(65­128)
V
DD
0.1
╣
F
SO2
Figure 3. Serial Connection
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APPLICATION INFORMATION
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1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
SI1
CLK
AO1
GND
SO2
VPP
NC
SO1
GND
NC
SI2
NC
AO2
R
L
SI
CLK
SI (SI1, SI2)
CLK
SO1, SO2
AO2 (Pixels 65­128)
65 Cycles
t
int
(1­64)
AO1
AO2
AO1 (pixels 1­64)
(65­128)
R
L
V
DD
0.1
╣
F
Figure 4. Parallel Connection
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0.4
0300
500
700
900
0.6
0.8
PHOTODIODE SPECTRAL RESPONSIVITY
0.2
­ Wavelength ­ nm
Normalized Responsivity
T
A
= 25
╟
C
1
1100
400
600
800
1000
Figure 5
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MECHANICAL INFORMATION
This assembly consists of a 2 sensor chips mounted on a printed-circuit board in a clear molded plastic package. The
distance between the top surface of the package and the surface of the sensor is nominally 0.040 inch (1 mm).
CL
L
C
Bottom View
7
6
5
4
3
2
1
8
9
10
11
12
13
14
0.420 (10,67)
0.380 (9,69)
0.156 (3,96)
0.146 (3,68)
0.020 (0,508)
0.016 (0,406)
Diameter All Pins
0.180 (4,6) MIN
0.135 (3,18)
0.110 (2,79)
Seating Plane
0.100 (2,54) T.P.
12 Places
(see Note C)
0.075 (1,91) MAX
Both Rows
0.085 (2,16) MAX
4 Places
Sensor Center Line
CL
1
0.01(0,254) NOM
First Pixel Location
0.310 (7,87)
0.290 (7,37)
0.760 (19,30)
0.720 (18,29)
0.045 (1,14)
0.035 (0,89)
0.016 (0,41)
0.014 (0,36)
NOTES: A. All linear dimensions are in inches and parenthetically in millimeters.
B. This drawing is subject to change without notice.
C. The true­position spacing is 0.100 inch (2,54 mm) between lead centerlines. Each pin centerline is located within 0.010 inch
( 0,25 mm) of its true longitudinal positions.
D. Index of refraction of clear plastic is 1.52.
Figure 6. Packaging Configuration
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PRODUCTION DATA
- information in this document is current at publication date. Products conform to
specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard
warranty. Production processing does not necessarily include testing of all parameters.
NOTICE
Texas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this
document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised
to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems.
TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product
design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that
the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular
purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any
and all liability, including without limitation consequential or incidental damages.
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR
USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY
RESULT IN PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY
UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER'S RISK.
TAOS, the TAOS logo, and Texas Advanced Optoelectronic Solutions are trademarks of Texas Advanced Optoelectronic Solutions
Incorporated.